| 1GIG DDR2 PC2-6400 (800) Major Memory |
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| Product Details M2Y51264TU88B4B, and M2Y1G64TU8HB4B are 240-Pin Double Data Rate 2 (DDR2) Synchronous DRAM Unbuffered Dual In-Line Memory Module (UDIMM), organized as one-rank 32Mx64 and 64Mx64 and two ranks 128Mx64 high-speed memory array. M2Y51264TU88B4B use eight 64Mx8 DDR2 SDRAMs. M2Y1G64TU8HB4B use sixteen 64Mx8 DDR2 SDRAMs. These DIMMs are manufactured using raw cards developed for broad industry use as reference designs. The use of these common design files minimizes electrical variation between suppliers. All Elixir DDR2 SDRAM DIMMs provide a high-performance, flexible 8-byte interface in a 5.25 long space-saving footprint. The DIMM is intended for use in applications operating up to 266 MHz (333MHz and 400MHz) clock speeds and achieves high-speed data transfer rates of up to 533MHz (667MHz and 800MHz). Prior to any access operation, the device latency and burst / length / operation type must be programmed into the DIMM by address inputs A0-A14 and I/O inputs BA0 and BA1 using the mode register set cycle. The DIMM uses serial presence-detect implemented via a serial 2,048-bit EEPROM using a standard IIC protocol. The first 128 bytes of serial PD data are programmed and locked during module assembly. The remaining 128 bytes are available for use by the customer. M2Y51264TU88B4B -25C 400MHz (2.50ns@ CL = 5) DDR2-800 PC2-6400 --------------------- Tech. Specs: JEDEC Standard 240-pin Dual In-Line Memory Module 32Mx64 DDR2 Unbuffered DIMM based on 32Mx16 DDR2 SDRAM B die 64Mx64 and 128Mx64 DDR2 Unbuffered DIMM based on 64Mx8 DDR2 SDRAM B die Intended for 266MHz, 333MHz, and 400MHz applications Inputs and outputs are SSTL-18 compatible VDD = VDDQ = 1.8Volt ± 0.1 SDRAMs have 4 internal banks for concurrent operation Differential clock inputs Data is read or written on both clock edges Bi-directional data strobe with one clock cycle preamble and one-half clock post-amble Address and control signals are fully synchronous to positive clock edge Programmable Operation: - Device Latency: 4, 5 - Burst Type: Sequential or Interleave - Burst Length: 4, 8 - Operation: Burst Read and Write Auto Refresh (CBR) and Self Refresh Modes Automatic and controlled precharge commands 14/10/1 Addressing (row/column/rank) 512MB 14/10/2 Addressing (row/column/rank) 1GB 7.8 ìs Max. Average Periodic Refresh Interval Serial Presence Detect Gold contacts SDRAMs in 60 ball BGA Package RoHS compliance |